The present invention relates to a modelling and simulation method.
It is well known to build a model of a system and to use a simulation process to show the behaviour of that model in various circumstances. Many modelling methodologies are well known, and the methodology selected for any particular application will be determined by the requirements of that application.
It is well known to model computer hardware systems prior to fabrication. Such modelling often includes applying a simulation process to a model to ensure that the modelled system exhibits the required behaviour. Once the simulation process has determined that the modelled system exhibits the required behaviour it is known that building an implementation which is verifiably the same as the model will yield the desired results.
It is well known to consider hardware systems at varying levels of abstraction during a modelling process. For example modelling often begins with a system specification written in a natural language such as English. Hardware and performance models are then created on the basis of this system specification, and such models are often created in a high-level computer programming language, such as C++. This stage allows validation of the architectural design of the system, and evaluation of the performance of various design features. When this stage in the modelling process has yielded a design satisfying the necessary requirements, unit specifications for individual components of the system are created in a natural language. These unit specifications are in turn converted into specifications written in a hardware description language (HDL) such as VHDL which allows modelling at a lower level such as Register Transfer Level (RTL).
The system and unit specifications described above are accompanied by appropriate test code to verify the behaviour of the system and units using a simulation process.
Such testing is usually carried out at RTL. Thus, system tests can be run only when detailed RTL design has been completed for all units of the system. This is a clear disadvantage of the prior art simulation methodology described above. Furthermore, testing a complex system in its entirety when all its component units are described at RTL is likely to be very time consuming both in the creation of test data (known as a testbench) and in simulation. Random testing can be used to obviate the need to create a testbench. However, such testing requires more effort to be expended in analysing simulation results.
In an attempt to solve these problems, modelling at a behavioural level has been tried using higher level features provided by C++ and VHDL. However, two severe problems remain. First, true system level modelling is still difficult to achieve because not enough higher level features are native to the languages. Second, behavioural level models cannot be connected to RTL models so no direct comparison can be made between the behavioural models and the RTL models and the validation of the behavioural models does not necessarily imply equivalent validation of the RTL models. Creating translators manually between the levels has proved to be a task at least as complex and error prone as creating the models themselves.
In an attempt to solve these two problems, the well known language VHDL was expanded to form a language VHDL+. VHDL+ allows the specification of a system at a much higher level of abstraction. Thus, it is possible to model behaviour at the system level instead of RTL or behavioural level, thereby saving valuable time both in the creation of suitable test data, and in the simulation process. Such modelling is described in Wilkes, D., and Hashmi, M. M. K, “Application of High Level Interface-Based design to Telecommunications System Hardware”, Proceedings of the 36th Design Automation Conference, 1999.
Some of the problems of the prior art described above arise because of the differing abstraction levels used to model hardware systems, and the difficulty of modelling differing levels of abstraction concurrently. VHDL+ attempted to solve these problems using a “interface” construct. An interface describes how data should be transferred between components at differing levels of abstraction. For example, a component of a high level model specified in VHDL+ may operate using bytes, while a model at RTL specified in VHDL may use bits. It is therefore necessary to convert a byte into (for example) a stream of eight serial bits, which, in a synchronous system, are moved between components in dependence upon a clock signal, if the high and low level components are to communicate. Such conversions can be specified within an interface construct. However, automatically generating and implementing these conversions has not been successfully carried out. Indeed, problems with the VHDL+ language have resulted in it being withdrawn from general availability, and an IEEE project to standardise the language has been withdrawn.
Therefore, although VHDL+ sought to overcome the problems associated with simulation at high levels, and also to overcome the problems of multi-level modelling, there is no known method of automatically and accurately simulating a system when parts of that system are specified at a high level (e.g. system level) and parts are specified at a lower level (e.g. RTL).
It is an object of the present invention to obviate or mitigate one or more of the problems set out above.
According to a first aspect of the present invention, there is provided a method for simulating behaviour of first and second interrelated components within a system comprising modelling behaviour of said first and second components using first and second functional specifications, simulating behaviour of said first and second components in predetermined circumstances by instantiating at least one first entity within a hierarchy of interrelated entities, and instantiating at least one further entity in response to the or each instantiated first entity, the or each further entity being selected by a simulation system on the basis of its hierarchical relationship with the at least one first entity.
Said first and second components may be represented by respective entities in said hierarchy of interrelated entities. Instances of the respective entities may be created.
In preferred embodiments of the invention said at least one further entity is a parent of the at least one first entity in the hierarchy of interrelated entities, or a child of the at least of first entity in the hierarchy of interrelated entities.
An entity within the predetermined hierarchy may be instantiated to represent data transmitted between the first and second components. Communication between the first and second components may be modelled.
The first component may be modelled at a higher level of abstraction than the second component. Thus, the invention may allow multi-level simulation, where the term is used to include simulation of a system in which different components are modelled at different levels of abstraction.
The method may comprise providing details of the relationship between the first and second components using said predetermined hierarchy. The predetermined hierarchy of entities may be deduced from the first and second functional specifications.
The first and second functional specifications may be specified as a computer program written in a computer programming language. The method may comprise specifying relationships between said first and second functional specifications in the computer program The method may also comprise processing said computer program to generate a further computer program. Said processing may translate said computer program from a first programming language to a second programming language. The second programming language may suitably be is C or C++.
Said processing may generate a recognition algorithm to instantiate at least one entity at a higher hierarchical level on the basis of at least one entity at a lower hierarchical level. Said processing may additionally or alternatively generate a generation algorithm to instantiate at least one entity at a lower hierarchical level on the basis of an entity at a higher hierarchical level. In preferred embodiments of the invention, said processing generates said generation algorithm and said recognition algorithm from a single block of computer program code.
The invention also provides a data carrier carrying computer readable program code means to cause a computer to execute procedure in accordance with the method set out above. The data carrier may be a volatile or non-volatile computer storage device.
Graphical user interfaces are a well known method of displaying information to a user of a computer system. Many simulation systems are available which make use of user interfaces such as graphical user interfaces to display to a user the results of a simulation. Traditionally, user interfaces operate using conventional means such as call back functions to update the display. In such conventional systems, the user interface is effectively “bolted on” to the simulation system.
It is an object of the present invention to provide an alternative means for providing a user interface to a simulation system.
According to a second aspect of the present invention, there is provided a method for modelling and simulating a system using an event based simulation system, comprising storing a plurality of models each representing a component of the system, storing status information for each model, generating a plurality of events affecting the status of at least one model, simulating behaviour of the system by processing said events, and outputting data from said simulation to a user by means of a user interface, wherein the user interface is modelled by the simulation system as a further component of the system, and said user interface is updated by processing said events.
Each model may comprise a sensitivity list containing a plurality of events, and the method may comprise updating the status associated with a model in response to an event contained in its sensitivity list. At least one event in the sensitivity list of the user interface may represent updating of another model. The user interface is preferably a graphical user interface. The invention also provides a data carrier carrying computer readable program code means to cause a computer to execute procedure in accordance with the method set out above.
Event based simulation systems are well known. In such simulation systems, an event list is stored in time order, and at a predetermined time all events occurring at that time are processed. The processing of events typically results in the updating of various objects within the simulated system.
Many event based simulation systems use a so called “time wheel” structure in which each time has associated with it a data structure containing all events occurring at that time. When that time occurs, the simulation system processes all events within the respective data structure in order to effect simulation.
It is an object of the present invention to provide an enhanced event management system for use in an event based simulation system.
According to a third aspect of the present invention there is provided a method for processing events in an event based simulation system in which each event has associated with it a time and a category, wherein a data structure is established containing details of all events occurring at a predetermined time, said data structure includes details of a plurality of sub data structures, each of said sub-data structures containing details of events having a respective category and occurring at the predetermined time, and the method comprises, processing each sub-data structure in a predetermined order, said processing comprising, for each sub-data structure, processing each event in the sub-data structure, and traversing the sub-data structure until no events exist which have associated with them the predetermined time and the respective category, and traversing said data structure until no events exist which have associated with them the predetermined time.
The data structure is preferably a cyclical data structure. The data structure may be a circular linked list. Each element of the data structure may contain a pointer to a sub-data structure containing events having associated with them a respective category. Each sub-data structure may be an array or a linked-list.